Memory Systems Performance & Workload Architect - DMTS/SMTS
Micron
Memory Systems Performance & Workload Architect - DMTS/SMTS at Micron is a full time role based in Bengaluru, India. It was published on 26 May 2026 and was open at last check.
| Role | Memory Systems Performance & Workload Architect - DMTS/SMTS |
|---|---|
| Company | Micron |
| Location | Bengaluru, India |
| Employment type | Full Time |
| Published | 26 May 2026 |
| Status | Open at last check |
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
Lead Micron’s workload-driven memory architecture and performance strategy across mobile and server-class platforms, shaping the future of DRAM, LPDDR, and HBM based memory systems. Own the end-to-end vision for workload characterization, benchmarking, and performance modeling, translating real-world application behavior into next-generation memory architecture, product features, and ecosystem innovations. Drive cross-organizational alignment spanning silicon, controllers, firmware, OS, hyperscalers, and industry partners, establishing Micron as a leader in workload-informed memory design.
Role Type: D MTS/ S MTS
Domain: Memory Systems Architecture, Workload Analysis, Performance Engineering for servers and mobiles.
Key Responsibilities
Benchmarking & Workload Characterization
Define the industry-leading benchmarking framework for Mobile( Geekbench , PCMark , MLPerf Mobile, real app traces etc ) and Server( SPEC CPU, SPECrate , STREAM, MLPerf , database/cloud workloads) Characterize, Memory bandwidth, latency, QoS, tail latency, Access patterns (locality, working set, read/write mix), NUMA behavior, cache interaction, memory-level parallelism Define and maintain representative workload suites for customer scenarios
Root Cause Analysis & Optimization
Lead deep dives using PMU counters, perf, eBPF , ftrace , ARM Streamline / VTune equivalents Identify bottlenecks in Memory controller scheduling, DRAM timing and row-buffer locality, Cache/memory interaction Drive optimizations across, Kernel (NUMA, huge pages, memory policies), Firmware / BIOS tuning, Application-level performance tuning
Architecture & System-Level Innovation
Drive system -level tradeoff analysis (performance, power, cost, scalability) to guide product decisions. Influence memory controller policies (scheduling, QoS, fairness) and the evolution of heterogeneous/tiered memory hierarchies.
Modeling & Predictive Analytics
Establish advanced frameworks for performance modeling, analytical simulation, and trace-driven workload replay at scale. Lead what-if exploration for future workloads (AI-first systems) and scaling across memory configurations (channels, ranks, interleaving, bandwidth). Translate models into product requirements, performance targets, and customer-facing guidance.
Cross-Stack Optimization
Drive end-to-end optimizations across application → OS → firmware → hardware stack. Influence Linux kernel memory management (NUMA, huge pages, scheduling), data placement, and memory tiering strategies. Partner with ecosystem teams to optimize AI frameworks, databases, and virtualization platforms for memory efficiency and performance.
Minimum Qualifications
15–24+ years in memory systems, performance engineering, or system architecture. Proven expertise in workload analysis and workload characterization at scale for servers and mobiles. Strong programming experience: Python, C/C++, and system-level tooling. Deep experience with benchmarking suites (SPEC, MLPerf , STREAM, and real-world workloads) and Linux performance tools (perf, eBPF , PMU-based profiling). Demonstrated impact on architecture decisions and product roadmaps through cross-functional leadership.
Ideal Attributes
Visionary thinker who connects workload trends → architecture → product strategy. Strong analytical, modeling, and data-driven decision-making capability. Exceptional ability to influence at executive and cross-organizational levels. Track record of industry impact (ecosystem leadership, standards, publications, or open source). Passion for innovation in next-generation memory systems.
Basic Qualifications
Bachelor’s degree in Computer Science , Electrical Engineering, or related field with 15+ years of experience, OR Master’s degree with 14+ years of experience, OR PhD with 12+ years of experience. 5+ years of experience with programming languages such as Python, C, C++, or Java.
Preferred Skills
Experience with AI/ML workloads (LLMs, recommendation systems, training clusters) and performance optimization. Expertise in databases and cloud-native systems ( RocksDB , MySQL/PostgreSQL, Redis/Memcached) and microservices. Expertise in performance modeling, simulation, and trace-driven workload replay frameworks. Familiarity with ARM and x86 system architectures and performance tooling.
About Micron Technology, Inc.
We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.
To learn more, please visit micron.com/careers
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.
To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.
Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.
AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.
Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.
Create your free OnJob profile to apply — we'll take you to Micron's application after sign-up. · Posted 26 May 2026.
Memory Systems Performance & Workload Architect - DMTS/SMTS at Micron — questions answered
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Micron lists this Memory Systems Performance & Workload Architect - DMTS/SMTS role in Bengaluru, India, advertised as full time work at that location. Larger employers sometimes cover several sites under one city name, so confirm the exact office with Micron before you apply.
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The Memory Systems Performance & Workload Architect - DMTS/SMTS posting at Micron was open at OnJob's last check of the employer's careers page, having been published on 26 May 2026. OnJob re-checks source listings on each build and marks a role closed once it disappears, but listings can close without notice, so the employer's own page is the final word.
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