Lead Verification Engineer
Cadence
Lead Verification Engineer at Cadence is a full time role based in NOIDA, India. It was published on 9 March 2026 and was open at last check.
| Role | Lead Verification Engineer |
|---|---|
| Company | Cadence |
| Location | NOIDA, India |
| Employment type | Full Time |
| Published | 9 March 2026 |
| Status | Open at last check |
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Position: Lead Verification Engineer -Applied ML – Functional Verification
About Us
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Position Overview
We are seeking results driven Pre-Silicon Verification Engineer with extensive experience in function verification (formal verification and/or simulation/UVM verification) and a passion for leveraging artificial intelligence to redefine the verification landscape. In this role, you will operate at the forefront of semiconductor design and AI innovation, utilizing advanced AI tools to architect, design, and validate the next generation of verification methodologies. You will collaborate closely with a highly skilled team of machine learning engineers experienced in training large language models on a scale, as well as accomplished software engineers with proven expertise in product development and deployment.
Key Responsibilities
- Contribute to the application of machine learning techniques aimed at streamlining traditional pre-silicon functional verification methodologies like formal verification and UVM.
- Develop agentic AI solutions using LLMs and latest ML technologies to accelerate pre-silicon Design Verification process.
- Employ AI enhanced Electronic Design Automation (EDA) tools to improve and expedite both the design and verification lifecycles.
- Engage directly with customers to understand requirements and deliver innovative, practical verification strategies.
- Collaborate effectively with machine learning and software engineering teams to validate output correctness, efficiency, and quality.
- Maintain current knowledge of advancements in AI-powered hardware verification and actively participate in fostering internal knowledge growth.
Required Qualifications
- Bachelor's or master's degree in electrical engineering, Computer Engineering, or related field.
- Proven expertise of more than 3-6 years in at least one of the pre-silicon ASIC verification methodologies such as Formal, SV/UVM and/or OVM.
- Advanced skills in debugging pre-silicon verification failures using waveform viewers and simulation analysis tools.
- Hands-on experience with industry standard EDA tools (e.g., Jasper, Xcelium, IMC).
- Strong programming skills in Verilog, System Verilog and Python
- Excellent communication skills and the ability to thrive in a team-oriented environment.
- Self-motivated, with a proactive approach to problem solving, continuous learning, and innovation.
- Exposure to LLMs and ML technologies like RAG, RFT, RL, and Agentic frameworks would be a plus.
The Cadence Advantage
- The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
- Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
- The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success
- Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests
- You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.
We’re doing work that matters. Help us solve what others can’t.
Create your free OnJob profile to apply — we'll take you to Cadence's application after sign-up. · Posted 9 Mar 2026.
Lead Verification Engineer at Cadence — questions answered
What does the Lead Verification Engineer role at Cadence pay?
Cadence does not publish a salary on this Lead Verification Engineer listing, so OnJob shows no figure for it rather than an estimate. For what this role pays across the market, the OnJob salary guides aggregate the live listings that do disclose pay.
Where is the Lead Verification Engineer role at Cadence based?
Cadence lists this Lead Verification Engineer role in NOIDA, India, advertised as full time work at that location. Larger employers sometimes cover several sites under one city name, so confirm the exact office with Cadence before you apply.
Is the Lead Verification Engineer role at Cadence still open?
The Lead Verification Engineer posting at Cadence was open at OnJob's last check of the employer's careers page, having been published on 9 March 2026. OnJob re-checks source listings on each build and marks a role closed once it disappears, but listings can close without notice, so the employer's own page is the final word.
How do you apply for the Lead Verification Engineer role at Cadence?
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