RTL Design Principal Engineer
Marvell
RTL Design Principal Engineer at Marvell is a full time role based in Bangalore, India. It was published on 8 May 2026 and was open at last check.
| Role | RTL Design Principal Engineer |
|---|---|
| Company | Marvell |
| Location | Bangalore, India |
| Employment type | Full Time |
| Published | 8 May 2026 |
| Status | Open at last check |
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
What You Can Expect
- Define the sub system architecture, micro-architecture and register specification for highly complex SoCs. Drive and participate in specification
- writeup
- Conduct detailed performance, architectural and design requirement reviews with cross-functional teams, IP Vendors and customers
- Implement a specification using RTL coding techniques and best practices
- Work with third party vendors to define customization requirements of third party IPs (controller, PHY , etc.)
- Work with the physical design teams, reviewing and providing guidance in floorplanning, power analysis, synthesis and timing signoff.
- Work with the verification team on pre-silicon verification tasks such as reviewing the verification test plans, coverage analysis, full-chip simulation
- and emulation, performance and power analysis and debug
- Help develop and/or evaluate design and verification methodologies and participate in improving existing ones
- Collaborate with and provide guidance to the post silicon and software teams for prototype bring up and performance tuning
- Provide mentorship to the more junior team member
What We're Looking For
- Bachelor’s or master’s degree and/or PhD degree in Computer Science, Electrical Engineering or related fields and 12+ years of related professional experience.
- Experience in creating architectural, micro-architectural, and register specifications.
- Verilog/System Verilog RTL coding with System Verilog assertions
- Well-versed in all stages of the ASIC design flow (including specification, architecture and design implementation, prototype bring-up)
- Should have worked on Full Chip Integration of Complex SoC design.
- Has worked on complex chips such as network processors, CPUs ,GPUs ,NOCs ,Switches , Machine Learning SoCs etc. owning full chip,
- subsystem and block level architecture and design
- Expertise in any of the following domains would be a big plus: networking, embedded systems architecture, computer architecture, machine learning
- accelerators
- Experience with scripting in Perl/Python/Shell
Additional Compensation and Benefit Elements
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
Create your free OnJob profile to apply — we'll take you to Marvell's application after sign-up. · Posted 8 May 2026.
RTL Design Principal Engineer at Marvell — questions answered
What does the RTL Design Principal Engineer role at Marvell pay?
Marvell does not publish a salary on this RTL Design Principal Engineer listing, so OnJob shows no figure for it rather than an estimate. For what this role pays across the market, the OnJob salary guides aggregate the live listings that do disclose pay.
Where is the RTL Design Principal Engineer role at Marvell based?
Marvell lists this RTL Design Principal Engineer role in Bangalore, India, advertised as full time work at that location. Larger employers sometimes cover several sites under one city name, so confirm the exact office with Marvell before you apply.
Is the RTL Design Principal Engineer role at Marvell still open?
The RTL Design Principal Engineer posting at Marvell was open at OnJob's last check of the employer's careers page, having been published on 8 May 2026. OnJob re-checks source listings on each build and marks a role closed once it disappears, but listings can close without notice, so the employer's own page is the final word.
How do you apply for the RTL Design Principal Engineer role at Marvell?
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