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Senior ASIC Design Engineer - NOC IP

NVIDIA

Bengaluru, IndiaFull Time

Senior ASIC Design Engineer - NOC IP at NVIDIA is a full time role based in Bengaluru, India. It was published on 16 April 2026 and was open at last check.

Senior ASIC Design Engineer - NOC IP at NVIDIA — key details
RoleSenior ASIC Design Engineer - NOC IP
CompanyNVIDIA
LocationBengaluru, India
Employment typeFull Time
Published16 April 2026
StatusOpen at last check

NVIDIA is seeking passionate, highly motivated, and creative senior design engineers to be part of its Graphics team working on the design of state of the art memory subsystem components used in their industry-leading Graphics Processors. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

In this position, you will be expected to make architectural trade-offs based on features, performance requirements and system limitations, come up with micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design. You will work with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and backend teams to accomplish your tasks.

What you’ll be doing:

  • Own micro-architecture and RTL development of design modules.
  • Micro-architect features to meet performance, power and area requirements.
  • Work with HW architects to define critical features.
  • Collaborate with verification teams to verify the correctness of implemented features.
  • Co-operate with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable.
  • Interact with FPGA and S/W teams to prototype the design and ensure that S/W is tested.
  • Work on post-silicon verification and debug.

What we need to see:

  • BS / MS or equivalent experience.
  • 7+ years of design experience.
  • Experience in RTL design of complex design units for at least two or three projects.
  • Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB).
  • Deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
  • Expertise in Verilog.

Ways to stand out from the crowd:

  • Design experience in memory subsystem or network interconnect IP.
  • Good debugging and problem solving skills.
  • Scripting knowledge (Python/Perl/shell).
  • Leadership experience in leading small 2-3 member teams.
  • Good interpersonal skills and ability & desire to work as a part of a team.

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you.

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.

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Create your free OnJob profile to apply — we'll take you to NVIDIA's application after sign-up. · Posted 16 Apr 2026.

Senior ASIC Design Engineer - NOC IP at NVIDIA — questions answered

What does the Senior ASIC Design Engineer - NOC IP role at NVIDIA pay?

NVIDIA does not publish a salary on this Senior ASIC Design Engineer - NOC IP listing, so OnJob shows no figure for it rather than an estimate. For what this role pays across the market, the OnJob salary guides aggregate the live listings that do disclose pay.

Where is the Senior ASIC Design Engineer - NOC IP role at NVIDIA based?

NVIDIA lists this Senior ASIC Design Engineer - NOC IP role in Bengaluru, India, advertised as full time work at that location. Larger employers sometimes cover several sites under one city name, so confirm the exact office with NVIDIA before you apply.

Is the Senior ASIC Design Engineer - NOC IP role at NVIDIA still open?

The Senior ASIC Design Engineer - NOC IP posting at NVIDIA was open at OnJob's last check of the employer's careers page, having been published on 16 April 2026. OnJob re-checks source listings on each build and marks a role closed once it disappears, but listings can close without notice, so the employer's own page is the final word.

How do you apply for the Senior ASIC Design Engineer - NOC IP role at NVIDIA?

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