Circuit Design & Verification Engineer
Appsierra Group →Circuit Design & Verification Engineer at Appsierra Group is a contract role based in Chennai, Tamil Nadu-35, India-101. The listing asks for 5–12 yrs of experience. Listed skills: SPICE, UVM-based verification, Verilog MOS switch-level models and Building block. It was published on 2 June 2026 and was open at last check.
| Role | Circuit Design & Verification Engineer |
|---|---|
| Company | Appsierra Group |
| Location | Chennai, Tamil Nadu-35, India-101 |
| Employment type | Contract |
| Experience asked | 5–12 yrs |
| Skills listed | SPICE, UVM-based verification, Verilog MOS switch-level models and Building block |
| Published | 2 June 2026 |
| Status | Open at last check |
Key Responsibilities
- Analyze and interpret transistor-level, gate-level, and memory circuit schematics to understand functionality, performance, and timing behavior.
- Perform circuit simulations using industry-standard SPICE simulators, including DC, transient, and timing analysis.
- Develop and validate building block and memory circuit designs through simulation, characterization, and correlation activities.
- Debug gate-level simulation failures and perform detailed root-cause analysis at both gate and transistor levels.
- Conduct what-if analysis and implement design modifications to validate corrective actions and optimize circuit performance.
- Work with latch-based and sequential logic designs, ensuring compliance with timing requirements and design constraints.
- Support timing characterization activities, including timing libraries, timing arcs, and associated file formats.
- Execute and analyze netlist simulations using Verilog MOS switch-level models, including zero-delay, unit-delay, and path-delay simulation methodologies.
- Correlate gate-level simulation results with SPICE simulations to ensure design accuracy and timing closure.
- Collaborate closely with design, verification, and architecture teams to resolve complex circuit and timing issues.
- Document findings and communicate technical concepts effectively to cross-functional engineering teams.
Required Qualifications
- Strong experience with transistor-level and gate-level circuit analysis and debugging.
- Hands-on expertise with SPICE simulation tools and circuit characterization methodologies.
- Solid understanding of memory architectures, latch-based designs, and timing verification.
- Experience with timing libraries, timing arcs, and characterization flows.
- Proficiency in Verilog switch-level modeling and gate-level simulation environments.
- Strong debugging skills with the ability to identify and resolve issues at both circuit and transistor levels.
- Excellent analytical, problem-solving, and communication skills.
Preferred Qualifications
- Experience with UVM-based verification environments.
- Familiarity with advanced timing validation and silicon correlation methodologies.
- Exposure to semiconductor design, verification, and post-silicon validation flows.
Create a free OnJob profile to apply and see your AI match score before you apply. · Posted 2 Jun 2026.
Circuit Design & Verification Engineer at Appsierra Group — questions answered
What does the Circuit Design & Verification Engineer role at Appsierra Group pay?
Appsierra Group does not publish a salary on this Circuit Design & Verification Engineer listing, so OnJob shows no figure for it rather than an estimate. For what this role pays across the market, the OnJob salary guides aggregate the live listings that do disclose pay.
Where is the Circuit Design & Verification Engineer role at Appsierra Group based?
Appsierra Group lists this Circuit Design & Verification Engineer role in Chennai, Tamil Nadu-35, India-101, advertised as contract work at that location and asking for 5–12 yrs of experience. Larger employers sometimes cover several sites under one city name, so confirm the exact office with Appsierra Group before you apply.
What skills does the Circuit Design & Verification Engineer role at Appsierra Group require?
The Circuit Design & Verification Engineer at Appsierra Group listing names SPICE, UVM-based verification, Verilog MOS switch-level models and Building block. Those are the skills the employer put on the posting itself, so they are the ones worth matching in your profile and covering first in an interview.
How much experience do you need for the Circuit Design & Verification Engineer role at Appsierra Group?
Appsierra Group asks for 5–12 yrs of experience on this Circuit Design & Verification Engineer posting, alongside SPICE, UVM-based verification and Verilog MOS switch-level models. Employers commonly consider candidates slightly under a stated band when the listed skills line up.
Is the Circuit Design & Verification Engineer role at Appsierra Group still open?
The Circuit Design & Verification Engineer posting at Appsierra Group was open at OnJob's last check of the employer's careers page, having been published on 2 June 2026. OnJob re-checks source listings on each build and marks a role closed once it disappears, but listings can close without notice, so the employer's own page is the final word.
How do you apply for the Circuit Design & Verification Engineer role at Appsierra Group?
Apply to the Circuit Design & Verification Engineer at Appsierra Group role through OnJob with a free profile: OnJob scores your fit against the listing, shows the skills lowering that score, and submits an ATS-ready profile. Creating a profile is free and needs no card.
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