Engineer, IPDev Layout
Micron
Engineer, IPDev Layout at Micron is a full time role based in Hyderabad - Phoenix Aquila, India. It was published on 20 June 2026 and was open at last check.
| Role | Engineer, IPDev Layout |
|---|---|
| Company | Micron |
| Location | Hyderabad - Phoenix Aquila, India |
| Employment type | Full Time |
| Published | 20 June 2026 |
| Status | Open at last check |
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life.
We are looking for Layout Design engineer at our Micron Technology’s DPG-IPDEV Team in Bangalore, India. DPG-IPDEV team is responsible for developing world-class analog and mixed signal IPs used in every cutting edge DRAM chip produced in Micron. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high-performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment.
Role and Responsibilities
- Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support.
- Perform layout verification like LVS/DRC/Antenna, quality check and support documentation.
- Responsible for timely delivery of block-level layouts with acceptable quality.
- Demonstrate leadership qualities in planning, area/time estimation, scheduling, and execution to meet project schedule/milestones in multiple project environment.
- Contribute to effective project-management.
- Effectively communicating with Global engineering teams to assure the success of layout project.
Qualification/Requirements
- 5 to 8 years' experience in analog/custom layout build in advanced CMOS process, in various technology nodes (Planar, FinFET )
- Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must.
- Should have hands on experience in creating layout of critical blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc.,
- Good understanding of Analog Layout fundamentals (e.cg., Matching, Electro-migration, Latch-up, coupling, crosstalk, IR-drop, active and passive static device parasitics etc.)
- Understanding layout effects on the circuit such as speed, capacitance, power and area etc.
- Ability to understand build constraints and implement high-quality layouts
- Ability to understand build hierarchy and different architectures for Memory designs.
- Excellent problem-solving skills in physical verification of custom layout.
- Multiple Tape out support experience will be an added advantage.
- Excellent verbal and written communication skills.
- Should be proactive in exploring and leveraging AI-related tools in day-to-day tasks.
Education
BE or MTech in Electronic/VLSI Engineering
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.
About Micron Technology, Inc.
We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.
To learn more, please visit micron.com/careers
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.
To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.
Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.
AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.
Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.
Create your free OnJob profile to apply — we'll take you to Micron's application after sign-up. · Posted 20 Jun 2026.
Engineer, IPDev Layout at Micron — questions answered
What does the Engineer, IPDev Layout role at Micron pay?
Micron does not publish a salary on this Engineer, IPDev Layout listing, so OnJob shows no figure for it rather than an estimate. For what this role pays across the market, the OnJob salary guides aggregate the live listings that do disclose pay.
Where is the Engineer, IPDev Layout role at Micron based?
Micron lists this Engineer, IPDev Layout role in Hyderabad - Phoenix Aquila, India, advertised as full time work at that location. Larger employers sometimes cover several sites under one city name, so confirm the exact office with Micron before you apply.
Is the Engineer, IPDev Layout role at Micron still open?
The Engineer, IPDev Layout posting at Micron was open at OnJob's last check of the employer's careers page, having been published on 20 June 2026. OnJob re-checks source listings on each build and marks a role closed once it disappears, but listings can close without notice, so the employer's own page is the final word.
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