Lead DFT Engineer
NXP Semiconductors
Lead DFT Engineer at NXP Semiconductors is a full time role based in Noida, India. It was published on 10 July 2026 and was open at last check.
| Role | Lead DFT Engineer |
|---|---|
| Company | NXP Semiconductors |
| Location | Noida, India |
| Employment type | Full Time |
| Published | 10 July 2026 |
| Status | Open at last check |
Digital Design Engineer with hand on experience in Scan insertion, ATPG, GLS. He/She will be responsible for understanding the DFT architecture of the design and providing the scan insertion collaterals to the implementation team, to enable scan insertion flows during synthesis. Should have proficiency in industry-standard DFT tools such as Mentor Tessent, Synopsys DFT Compiler, Cadence Encounter Test. Should be able to contribute to ATPG at partition and SoC level. . Should have experience with DFT GLS simulation tools and methodologies, including fault modeling and coverage analysis. Should be familiar with industry standards such as IEEE 1149.1 (JTAG) and IEEE 1687 (IJTAG). Effective communication and teamwork skills, with the ability to collaborate across functions.
Create your free OnJob profile to apply — we'll take you to NXP Semiconductors's application after sign-up. · Posted 10 Jul 2026.
Lead DFT Engineer at NXP Semiconductors — questions answered
What does the Lead DFT Engineer role at NXP Semiconductors pay?
NXP Semiconductors does not publish a salary on this Lead DFT Engineer listing, so OnJob shows no figure for it rather than an estimate. For what this role pays across the market, the OnJob salary guides aggregate the live listings that do disclose pay.
Where is the Lead DFT Engineer role at NXP Semiconductors based?
NXP Semiconductors lists this Lead DFT Engineer role in Noida, India, advertised as full time work at that location. Larger employers sometimes cover several sites under one city name, so confirm the exact office with NXP Semiconductors before you apply.
Is the Lead DFT Engineer role at NXP Semiconductors still open?
The Lead DFT Engineer posting at NXP Semiconductors was open at OnJob's last check of the employer's careers page, having been published on 10 July 2026. OnJob re-checks source listings on each build and marks a role closed once it disappears, but listings can close without notice, so the employer's own page is the final word.
How do you apply for the Lead DFT Engineer role at NXP Semiconductors?
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