Senior ASIC Verification Engineer - PMU
NVIDIA
Senior ASIC Verification Engineer - PMU at NVIDIA is a full time role based in Shanghai, China. It was published on 31 July 2026 and was open at last check.
| Role | Senior ASIC Verification Engineer - PMU |
|---|---|
| Company | NVIDIA |
| Location | Shanghai, China |
| Employment type | Full Time |
| Published | 31 July 2026 |
| Status | Open at last check |
As chip sizes continue to grow, power efficiency has become critical across all NVIDIA products - from data centers to automotive and personal computing. Our PMU IP, developed over the past 17 years, is crucial in optimizing chip performance and efficiency in both idle and active scenarios. The PMU IP consists of a RISC-V core and custom-designed control logic. It collects and processes data from the entire chip, working in tandem with software running on the RISC-V core to determine optimal operating points. We are seeking a Senior ASIC Engineer who can help architect the next generation PMU for AI datacenter.
What you’ll be doing:
- Collaborate with the production SW team and power arch team to define the architecture/micro-architecture for various power features.
- Learn how PMU's function impacts the system and support the silicon debug.
- Implement the micro-architecture to RTL design.
What we need to see:
- BS / MS in electrical / computer engineering.
- 3+ years working experience, with preference given to those with MS or equivalent experience.
- Strong communication skills and proficient oral English since this role require frequent communication with external teams mainly in USA and India.
- Familiar with frontend ASIC design.
Ways to stand out from the crowd:
- Experience on active power/low power design.
- Play similar role in other system-level control features if not power related.
Create your free OnJob profile to apply — we'll take you to NVIDIA's application after sign-up. · Posted 31 Jul 2026.
Senior ASIC Verification Engineer - PMU at NVIDIA — questions answered
What does the Senior ASIC Verification Engineer - PMU role at NVIDIA pay?
NVIDIA does not publish a salary on this Senior ASIC Verification Engineer - PMU listing, so OnJob shows no figure for it rather than an estimate. For what this role pays across the market, the OnJob salary guides aggregate the live listings that do disclose pay.
Where is the Senior ASIC Verification Engineer - PMU role at NVIDIA based?
NVIDIA lists this Senior ASIC Verification Engineer - PMU role in Shanghai, China, advertised as full time work at that location. Larger employers sometimes cover several sites under one city name, so confirm the exact office with NVIDIA before you apply.
Is the Senior ASIC Verification Engineer - PMU role at NVIDIA still open?
The Senior ASIC Verification Engineer - PMU posting at NVIDIA was open at OnJob's last check of the employer's careers page, having been published on 31 July 2026. OnJob re-checks source listings on each build and marks a role closed once it disappears, but listings can close without notice, so the employer's own page is the final word.
How do you apply for the Senior ASIC Verification Engineer - PMU role at NVIDIA?
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