ASIC Design Engineer, High Speed IO
NVIDIA
ASIC Design Engineer, High Speed IO at NVIDIA is a full time role based in Bengaluru, India. It was published on 7 August 2026 and was open at last check.
| Role | ASIC Design Engineer, High Speed IO |
|---|---|
| Company | NVIDIA |
| Location | Bengaluru, India |
| Employment type | Full Time |
| Published | 7 August 2026 |
| Status | Open at last check |
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
We are now looking for RTL Design engineers for our High Speed IO IP's deployed in Automotive chips. As one of the primary designers, you will be responsible for UFS/Ethernet/PCIE/USB IP's of next generation chips. One should possess strong digital design and verification fundamentals.
What you'll be doing:
As a designer, be responsible for understanding the specific protocol concepts and features, make architectural trade-offs based on feature/performance/power requirements, analyze system implications, come up with the micro-architecture, implement RTL, drive the verification, close timing, and support silicon validation.
During the course of a project you would end up driving the following aspects of design for your unit:
- Own micro-architecture and RTL development of design modules
- Micro-architect features to meet performance, power and area requirements
- Work with HW architects to define critical features
- Partner with verification teams to verify the correctness of implemented features
- Collaborate with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable.
What we need to see:
- You should be BTech/MTech in EE, ECE or similar stream, having a proven track record with 2+ years of experience in crafting complex Units and CPU/micro-controller based Sub-systems
- Knowledge of HSIO standards, protocols and architectures of modern SOC's would be a significant plus
- Excellent influencing skills resulting in collaboration with cross-cultural, multi geography and matrixed teams
- Good debugging, analytical and problem solving skills
- Great interpersonal skills and ability to work as an excellent teammate
- Working exposure with AI tools like Claude and Cursor would be a plus
We have some of the most brilliant and talented people in the world working for us. If you're creative and independent, with a genuine real passion for technology and improving the state of art, we want to hear from you!
Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/
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Create your free OnJob profile to apply — we'll take you to NVIDIA's application after sign-up. · Posted 7 Aug 2026.
ASIC Design Engineer, High Speed IO at NVIDIA — questions answered
What does the ASIC Design Engineer, High Speed IO role at NVIDIA pay?
NVIDIA does not publish a salary on this ASIC Design Engineer, High Speed IO listing, so OnJob shows no figure for it rather than an estimate. For what this role pays across the market, the OnJob salary guides aggregate the live listings that do disclose pay.
Where is the ASIC Design Engineer, High Speed IO role at NVIDIA based?
NVIDIA lists this ASIC Design Engineer, High Speed IO role in Bengaluru, India, advertised as full time work at that location. Larger employers sometimes cover several sites under one city name, so confirm the exact office with NVIDIA before you apply.
Is the ASIC Design Engineer, High Speed IO role at NVIDIA still open?
The ASIC Design Engineer, High Speed IO posting at NVIDIA was open at OnJob's last check of the employer's careers page, having been published on 7 August 2026. OnJob re-checks source listings on each build and marks a role closed once it disappears, but listings can close without notice, so the employer's own page is the final word.
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