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Senior ASIC Methodology, Flow and Integration Engineer

NVIDIA

Bengaluru, IndiaFull Time
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Senior ASIC Methodology, Flow and Integration Engineer at NVIDIA is a full time role based in Bengaluru, India. It was published on 7 August 2026 and was open at last check.

Senior ASIC Methodology, Flow and Integration Engineer at NVIDIA — key details
RoleSenior ASIC Methodology, Flow and Integration Engineer
CompanyNVIDIA
LocationBengaluru, India
Employment typeFull Time
Published7 August 2026
StatusOpen at last check

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. We are now looking for ASIC Flow and Integration Engineer to drive design methodology, automation, and integration for our High Speed IO team .

What you'll be doing:

As one of the primary methodology engineer, you’ll work across all NVIDIA-delivered projects, owning the integration process and collaborating with global teams to define and implement best-in-class methodologies. You’ll operate beyond RTL coding—building infrastructure and systems that are modular, reusable, and easily deployable across diverse silicon platforms. During the course of a project you would end up driving the following aspects of:

  • Own the full-chip and block-level integration process across multiple NVIDIA SoC and GPU projects.
  • Stitch together RTL units and ensure seamless connectivity, and hierarchy management.
  • Define and evolve internal design methodologies to improve scalability, quality, and turnaround time.
  • Build automation pipelines using Python/Perl to streamline integration, debug, and delivery.
  • Develop modular and reusable systems that can be easily delivered and adapted across different SoC and GPU architectures.
  • Collaborate extensively with RTL, verification, physical design, and architecture teams to ensure flow compatibility and design readiness.
  • Drive full-chip debug efforts, connectivity, and functional issues across multiple hierarchies and technology nodes.
  • Contribute to continuous improvement of internal standards and mentor engineers on flow usage and integration practices.

What we need to see:

  • BS or B.Tech or MS or M.tech in EE, ECE, CS, or equivalent degree with 3+ years or more experience in design integration and methodologies for ASIC design.
  • Comprehensive understanding of IP development flows, build flows is a must
  • Excellent influencing skills resulting in collaboration with cross-cultural, multi geography and matrixed teams
  • Good debugging, analytical and problem solving skills
  • Great interpersonal skills and ability to work as an excellent teammate
  • Working exposure with AI tools like Claude and Cursor would be a plus

We have some of the most brilliant and talented people in the world working for us. If you're creative and independent, with a genuine real passion for technology and improving the state of art, we want to hear from you! Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/

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Create your free OnJob profile to apply — we'll take you to NVIDIA's application after sign-up. · Posted 7 Aug 2026.

Senior ASIC Methodology, Flow and Integration Engineer at NVIDIA — questions answered

What does the Senior ASIC Methodology, Flow and Integration Engineer role at NVIDIA pay?

NVIDIA does not publish a salary on this Senior ASIC Methodology, Flow and Integration Engineer listing, so OnJob shows no figure for it rather than an estimate. For what this role pays across the market, the OnJob salary guides aggregate the live listings that do disclose pay.

Where is the Senior ASIC Methodology, Flow and Integration Engineer role at NVIDIA based?

NVIDIA lists this Senior ASIC Methodology, Flow and Integration Engineer role in Bengaluru, India, advertised as full time work at that location. Larger employers sometimes cover several sites under one city name, so confirm the exact office with NVIDIA before you apply.

Is the Senior ASIC Methodology, Flow and Integration Engineer role at NVIDIA still open?

The Senior ASIC Methodology, Flow and Integration Engineer posting at NVIDIA was open at OnJob's last check of the employer's careers page, having been published on 7 August 2026. OnJob re-checks source listings on each build and marks a role closed once it disappears, but listings can close without notice, so the employer's own page is the final word.

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