Physical Design Engineer
NXP Semiconductors
Physical Design Engineer at NXP Semiconductors is a full time role based in Pune, India. It was published on 14 July 2026 and was open at last check.
| Role | Physical Design Engineer |
|---|---|
| Company | NXP Semiconductors |
| Location | Pune, India |
| Employment type | Full Time |
| Published | 14 July 2026 |
| Status | Open at last check |
Job Summary NXP Semiconductors is seeking a Physical Design Engineer (G2) with strong fundamentals in physical design implementation to join our growing VLSI team. In this role, you will contribute to the implementation and signoff of complex SoC/IP blocks in advanced technology nodes, ensuring high-quality delivery aligned with NXP’s stringent PPA (Power, Performance, Area) and reliability standards.
Key Responsibilities
- Execute block-level physical design from synthesized netlist to GDSII: Floorplanning and power grid design
- Placement and optimization
- Clock Tree Synthesis (CTS)
- Routing and post-route optimization
- Drive timing convergence across MCMM scenarios in collaboration with STA teams
- Ensure design closure including: Setup/hold timing closure
- DRC/LVS clean signoff
- IR drop and electromigration (EM) compliance
- Debug and resolve: Congestion issues
- SI/crosstalk problems
- Functional and physical ECOs
- Collaborate cross-functionally with: RTL/design teams to improve QoR
- DFT teams for test readiness
- Packaging and full-chip integration teams
- Contribute to methodology improvements and automation through scripting
- Follow and enforce NXP design methodologies, quality and reliability standards
Required Qualifications
- Bachelor’s/Master’s degree in Electronics / Electrical Engineering / Microelectronics
- 3–5 years of experience in ASIC Physical Design
- Strong understanding of: Physical design flow (FP → P&R → Signoff)
- Static Timing Analysis fundamentals
- CMOS digital design basics
- Hands-on experience with industry EDA tools: Cadence (Innovus/Genus) or Synopsys (ICC2/Fusion Compiler, PrimeTime)
- Good scripting skills in Tcl, Python, or Shell
- Experience in advanced nodes (16nm and below)
- Knowledge of: Low-power design flows (UPF/CPF)
- Multi-voltage / multi-domain designs
- Familiarity with physical verification tools (Calibre)
Create your free OnJob profile to apply — we'll take you to NXP Semiconductors's application after sign-up. · Posted 14 Jul 2026.
Physical Design Engineer at NXP Semiconductors — questions answered
What does the Physical Design Engineer role at NXP Semiconductors pay?
NXP Semiconductors does not publish a salary on this Physical Design Engineer listing, so OnJob shows no figure for it rather than an estimate. For what this role pays across the market, the OnJob salary guides aggregate the live listings that do disclose pay.
Where is the Physical Design Engineer role at NXP Semiconductors based?
NXP Semiconductors lists this Physical Design Engineer role in Pune, India, advertised as full time work at that location. Larger employers sometimes cover several sites under one city name, so confirm the exact office with NXP Semiconductors before you apply.
Is the Physical Design Engineer role at NXP Semiconductors still open?
The Physical Design Engineer posting at NXP Semiconductors was open at OnJob's last check of the employer's careers page, having been published on 14 July 2026. OnJob re-checks source listings on each build and marks a role closed once it disappears, but listings can close without notice, so the employer's own page is the final word.
How do you apply for the Physical Design Engineer role at NXP Semiconductors?
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