Senior Physical Design Engineer
NXP Semiconductors
Senior Physical Design Engineer at NXP Semiconductors is a full time role based in Pune, India. It was published on 27 August 2026 and was open at last check.
| Role | Senior Physical Design Engineer |
|---|---|
| Company | NXP Semiconductors |
| Location | Pune, India |
| Employment type | Full Time |
| Published | 27 August 2026 |
| Status | Open at last check |
Job Title: Senior Physical Design Engineer Location Pune / Bangalore / Hyderabad (Hybrid)
Experience
8-10 Years
Job Summary
We are seeking a highly motivated and experienced Senior Physical Design Engineer to join our VLSI Physical Design team. The candidate will be responsible for delivering high-quality physical implementation of complex SoC/IP blocks from netlist to GDSII, ensuring timing, power, area, and reliability targets are met. The ideal candidate should have hands-on expertise in advanced node design implementation and signoff methodologies.
Key Responsibilities
- Own end-to-end physical design implementation of complex digital blocks/subsystems.
- Drive floorplanning, power planning, placement, CTS, routing, timing closure, and physical verification.
- Perform design optimization for PPA (Power, Performance, Area) targets.
- Execute timing closure across multiple operating modes and process corners.
- Analyze and resolve setup, hold, SI, IR-drop, EM, and congestion issues.
- Collaborate with RTL, Synthesis, DFT, STA, Package, and Signoff teams to achieve project milestones.
- Support ECO implementation and tapeout activities.
- Develop and enhance PD methodologies, automation flows, and scripts to improve productivity.
- Review design quality and mentor junior engineers.
- Work closely with global cross-functional teams.
Required Technical Skills
- Strong expertise in: Floorplanning
- Power Planning
- Placement Optimization
- Clock Tree Synthesis (CTS)
- Routing
- Timing Closure
- Physical Verification
STA & Signoff
- In-depth knowledge of: Static Timing Analysis (STA)
- Multi-Mode Multi-Corner (MMMC) methodologies
- Crosstalk/SI Analysis
- ECO Flows
- Timing Signoff
Physical Signoff
- Experience with: IR Drop Analysis
- Electromigration (EM) Analysis
- DRC/LVS Closure
- Reliability Checks
Tools
Hands-on experience with industry-standard EDA tools:
- Cadence Innovus
- Synopsys ICC2
- PrimeTime
- Tempus
- RedHawk / Voltus
- StarRC / Quantus
- Calibre
Educational Qualification Bachelor's or Master's Degree in Electronics, VLSI, Electrical Engineering, or related field.
Create your free OnJob profile to apply — we'll take you to NXP Semiconductors's application after sign-up. · Posted 27 Aug 2026.
Senior Physical Design Engineer at NXP Semiconductors — questions answered
What does the Senior Physical Design Engineer role at NXP Semiconductors pay?
NXP Semiconductors does not publish a salary on this Senior Physical Design Engineer listing, so OnJob shows no figure for it rather than an estimate. For what this role pays across the market, the OnJob salary guides aggregate the live listings that do disclose pay.
Where is the Senior Physical Design Engineer role at NXP Semiconductors based?
NXP Semiconductors lists this Senior Physical Design Engineer role in Pune, India, advertised as full time work at that location. Larger employers sometimes cover several sites under one city name, so confirm the exact office with NXP Semiconductors before you apply.
Is the Senior Physical Design Engineer role at NXP Semiconductors still open?
The Senior Physical Design Engineer posting at NXP Semiconductors was open at OnJob's last check of the employer's careers page, having been published on 27 August 2026. OnJob re-checks source listings on each build and marks a role closed once it disappears, but listings can close without notice, so the employer's own page is the final word.
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